The present disclosure relates to technology for controlling a circuit configuration of a programmable device.
Recent years have witnessed the widespread use of programmable logic devices (PLD) such as a field programmable gate array (FPGA) and a complex programmable logic device (CPLD) of which the circuit configuration can be defined by users. These devices allow their circuit logical configuration to be changed not only at the time of shipment but also after they have started operating. The PLD thus has broader utility than existing devices whose operations are fixed. The PLD is also effective in lowering the costs involved including the cost of development.
The PLD has the characteristic of allowing its circuits to be appropriately reconfigured to overcome a malfunction that may occur. In view of this, techniques have been proposed to perform self-diagnosis for malfunctions and reconfigure relevant circuits as needed. These techniques provide, for example, redundant circuits that may be arranged to reconfigure the defective processing circuit into the same state as that of a normally operating processing circuit (e.g., see Japanese Patent Laid-open No. 2011-216020).